Ongoing
Hardware-Aware AI Algorithm Design
Undergraduate research on efficient AI inference and hardware-aware optimization for accelerator-friendly algorithms.
AI AcceleratorHardware-Aware MLResearch
Undergraduate Researcher · Electrical Engineering
Digital IC, Computer Architecture, and AI Accelerator Design.
I am an undergraduate student in Electrical and Electronics Engineering at Chung-Ang University. My current interests lie in hardware-oriented AI systems, including RTL design, computer architecture, and System on Chip(SoC).
Digital IC DesignComputer ArchitectureAI AcceleratorsRTL DesignSoC
Featured Projects
Selected research and engineering projects related to AI hardware, FPGA systems, and embedded design.
Ongoing
FPGA-based Onboard AI Inference Subsystem
FPGA implementation of a selective downlink-oriented onboard AI inference subsystem for small satellites.
FPGAVerilogOnboard AISatellite
Awarded
Car Camping Leveling Cushion System
Capstone project involving tilt measurement, control logic, and power supply circuit design. Awarded Excellence Prize.
Embedded SystemControl LogicPower Circuit
Current Focus
Research
Hardware-aware AI inference, accelerator-friendly optimization, and FPGA-based prototyping.
Engineering
RTL design, digital systems, embedded platforms, and SoC-oriented implementation.
Long-term Direction
SoC design for edge AI, aerospace, robotics, and mobility systems.